CVE-2020-24512

Publication date 8 June 2021

Last updated 24 July 2024


Ubuntu priority

Cvss 3 Severity Score

2.8 · Low

Score breakdown

Observable timing discrepancy in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.

From the Ubuntu Security Team

Travis Downs discovered that some Intel processors did not properly flush cache-lines for trivial-data values. This may allow an unauthorized user to infer the presence of these trivial-data-cache-lines via timing sidechannel attacks. A local attacker could use this to expose sensitive information.

Read the notes from the security team

Status

Package Ubuntu Release Status
intel-microcode 22.04 LTS jammy
Fixed 3.20210608.0ubuntu1
21.10 impish
Fixed 3.20210608.0ubuntu1
21.04 hirsute
Fixed 3.20210608.0ubuntu0.21.04.1
20.10 groovy
Fixed 3.20210608.0ubuntu0.20.10.1
20.04 LTS focal
Fixed 3.20210608.0ubuntu0.20.04.1
18.04 LTS bionic
Fixed 3.20210608.0ubuntu0.18.04.1
16.04 LTS xenial
14.04 LTS trusty

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Notes


sbeattie

INTEL-TA-00464 no kernel component to this MCU update

Severity score breakdown

Parameter Value
Base score 2.8 · Low
Attack vector Local
Attack complexity High
Privileges required Low
User interaction None
Scope Changed
Confidentiality Low
Integrity impact None
Availability impact None
Vector CVSS:3.1/AV:L/AC:H/PR:L/UI:N/S:C/C:L/I:N/A:N

References

Related Ubuntu Security Notices (USN)

    • USN-4985-1
    • Intel Microcode vulnerabilities
    • 9 June 2021

Other references