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CVE-2023-34326

Published: 5 January 2024

The caching invalidation guidelines from the AMD-Vi specification (48882—Rev 3.07-PUB—Oct 2022) is incorrect on some hardware, as devices will malfunction (see stale DMA mappings) if some fields of the DTE are updated but the IOMMU TLB is not flushed. Such stale DMA mappings can point to memory ranges not owned by the guest, thus allowing access to unindented memory regions.

Notes

AuthorNote
mdeslaur
hypervisor packages are in universe. For
issues in the hypervisor, add appropriate
tags to each section, ex:
Tags_xen: universe-binary

Priority

Medium

Cvss 3 Severity Score

7.8

Score breakdown

Status

Package Release Status
xen
Launchpad, Ubuntu, Debian
bionic Needs triage

focal Needs triage

jammy Needs triage

lunar Ignored
(end of life, was needs-triage)
mantic Ignored
(end of life, was needs-triage)
noble Needs triage

trusty Ignored
(end of standard support)
upstream Needs triage

xenial Needs triage

Binaries built from this source package are in Universe and so are supported by the community.

Severity score breakdown

Parameter Value
Base score 7.8
Attack vector Local
Attack complexity Low
Privileges required Low
User interaction None
Scope Unchanged
Confidentiality High
Integrity impact High
Availability impact High
Vector CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:H